_mm_frcz_sd
Visual Studio 2010 SP1 is required.
Microsoft Specific
Generates the XOP XMM instruction vfrczsd to extract the fractional part of the low-order double-precision floating-point value of its second source.
__m128d _mm_frcz_sd (
__m128d high,
__m128d src
);
Parameters
[in] high
A 128-bit parameter that contains a 64-bit floating-point value in its high-order quadword.[in] src
A 128-bit parameter that contains a 64-bit floating-point value in its low-order quadword.
Return value
A 128-bit result r that contains two 64-bit floating-point values.
r[0] := fractional_part_of(src[0]);
r[1] := high[1];
Requirements
Intrinsic |
Architecture |
|---|---|
_mm_frcz_sd |
XOP |
Header file <intrin.h>
Remarks
The fractional portion of the low-order double-precision floating-point value in src is extracted and stored as the low value in the destination. The sign of this result is the sign of its source value. The high-order double-precision floating-point value in high is stored as the high value in the destination.
The vfrczsd instruction is part of the XOP family of instructions. Before you use this intrinsic, you must ensure that the processor supports this instruction. To determine hardware support for this instruction, call the __cpuid intrinsic with InfoType = 0x80000001 and check bit 11 of CPUInfo[2] (ECX). This bit is 1 when the instruction is supported, and 0 otherwise.
Example
#include <stdio.h>
#include <intrin.h>
main()
{
__m128d a, b, d;
int i;
a.m128d_f64[0] = 1.125;
a.m128d_f64[1] = -17.875;
b.m128d_f64[0] = 0.;
b.m128d_f64[1] = 1.;
d = _mm_frcz_sd(b, a);
printf(" %.3lf %.3lf\n", d.m128d_f64[0], d.m128d_f64[1]);
}
0.125 1.000