_mm_frcz_ss
Visual Studio 2010 SP1 is required.
Microsoft Specific
Generates the XOP XMM instruction vfrczss to extract the fractional part of the low-order single-precision floating-point value of its second source.
__m128d _mm_frcz_ss (
__m128 high,
__m128 src
);
Parameters
[in] high
A 128-bit parameter that contains 32-bit floating-point values in its three high-order doublewords.[in] src
A 128-bit parameter that contains a 32-bit floating-point value in its low-order doubleword.
Return value
A 128-bit result r that contains four 32-bit floating-point values.
r[0] := fractional_part_of(src[0]);
r[i] := high[i]; // i = 1,2,3
Requirements
Intrinsic |
Architecture |
|---|---|
_mm_frcz_ss |
XOP |
Header file <intrin.h>
Remarks
The fractional portion of the low-order single-precision floating-point value in src is extracted and stored as the low value in the destination. The sign of this result is the sign of its source value. The three high-order single-precision floating-point values in high are stored as the corresponding values in the destination.
The vfrczss instruction is part of the XOP family of instructions. Before you use this intrinsic, you must ensure that the processor supports this instruction. To determine hardware support for this instruction, call the __cpuid intrinsic with InfoType = 0x80000001 and check bit 11 of CPUInfo[2] (ECX). This bit is 1 when the instruction is supported, and 0 otherwise.
Example
#include <stdio.h>
#include <intrin.h>
int main()
{
__m128 a, b, d;
int i;
a.m128_f32[0] = 1.125;
b.m128_f32[1] = -17.875;
b.m128_f32[2] = 0.;
b.m128_f32[3] = 1.;
d = _mm_frcz_ss(b, a);
printf(" %.3f %.3f %.3f %.3f\n", d.m128_f32[0], d.m128_f32[1],
d.m128_f32[2], d.m128_f32[3]);
}
0.125 -17.875 0.000 1.000