_mm_shl_epi8
Visual Studio 2010 SP1 is required.
Microsoft Specific
Generates the XOP instruction vpshlb to do a logical shift of each of the bytes in its first source by an amount specified in the second.
__m128i _mm_shl_epi8 (
__m128i src,
__m128i counts
);
Parameters
[in] src
A 128-bit parameter that contains sixteen 8-bit unsigned integers.[in] counts
A 128-bit parameter that contains sixteen 8-bit signed integers.
Return value
A 128-bit result r that contains sixteen 8-bit unsigned integers.
r[i] := (counts[i] >= 0) ? src[i] << counts[i]) :
src[i] >> -counts[i]);
Requirements
Intrinsic |
Architecture |
|---|---|
_mm_shl_epi8 |
XOP |
Header file <intrin.h>
Remarks
Each 8-bit unsigned integer value in src is shifted by the number of bits specified in the corresponding value in counts, and the 8-bit unsigned integer result is stored as the corresponding value in the destination. If the value in counts is positive, the shift is to the left (toward the most significant bit) and zeros are shifted in at the right end; otherwise, it is to the right and zeros are shifted in at the left end. If a shift count is greater than 7 or less than -7, the corresponding result value is 0.
The vpshlb instruction is part of the XOP family of instructions. Before you use this intrinsic, you must ensure that the processor supports this instruction. To determine hardware support for this instruction, call the __cpuid intrinsic with InfoType = 0x80000001 and check bit 11 of CPUInfo[2] (ECX). This bit is 1 when the instruction is supported, and 0 otherwise.
Example
#include <stdio.h>
#include <intrin.h>
int main()
{
__m128i a, b, d;
int i;
for (i = 0; i < 16; i++) {
a.m128i_u8[i] = (i << 4) | (15 - i);
b.m128i_i8[i] = i - 8;
}
printf_s("data: ");
for (i = 0; i < 16; i++) printf_s(" %02x", a.m128i_u8[i]);
printf_s("\nshifted by ");
for (i = 0; i < 16; i++) printf_s(" %2d", b.m128i_i8[i]);
d = _mm_shl_epi8(a, b);
printf_s("\ngives ");
for (i = 0; i < 16; i++) printf_s(" %02x", d.m128i_u8[i]);
printf_s("\n");
}
data: 0f 1e 2d 3c 4b 5a 69 78 87 96 a5 b4 c3 d2 e1 f0 shifted by -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 gives 00 00 00 01 04 0b 1a 3c 87 2c 94 a0 30 40 40 00