Hi Greco Alessia,
How is your issue going? Has it been resolved yet? If it has, please consider accepting the answer as it helps others sharing the same problem benefit too. Thank you :)
VPHAN
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Hello! We are optimizing Windows 11 ARM guest performance within a QEMU-emulated infrastructure to ensure consistent benchmarking results. We notice irregular, fluctuating clock speed readings across individual vCPUs and require a method to force the guest operating system to recognize a static, uniform frequency value. Despite manual injections of specified LowestFrequency and NominalFrequency parameters into the ACPI CPPC (Type 12) structures, as well as modifications to the SMBIOS Type 4 Max Speed and Current Speed fields, the Windows kernel continues to ignore these static definitions. How can we manipulate the hypervisor's firmware presentation so that Windows 11 adheres to these hardcoded frequency metrics rather than dynamically polling the varying host physical processor states? Thanks in advance.
Hi Greco Alessia,
How is your issue going? Has it been resolved yet? If it has, please consider accepting the answer as it helps others sharing the same problem benefit too. Thank you :)
VPHAN
Hi Greco Alessia,
The technically correct and supported approach in a QEMU ARM benchmarking environment is to stabilize the virtualization layer. This includes keeping a fixed virtual CPU topology, pinning QEMU vCPU and IOThread execution to dedicated host cores, minimizing host scheduler interference, and configuring the Windows guest for maximum performance using documented powercfg processor settings such as PROCTHROTTLEMIN 100 and PROCTHROTTLEMAX 100. These policies are associated with the active power scheme stored under HKLM\SYSTEM\CurrentControlSet\Control\Power\User\PowerSchemes, but they influence processor policy behavior rather than overriding runtime telemetry.
There is currently no supported Microsoft mechanism that forces Windows 11 ARM to permanently trust static SMBIOS or ACPI CPPC frequency declarations over live processor performance feedback in a virtualized environment. Remaining clock variability after host-side stabilization is typically caused by hypervisor scheduling behavior, thermal management, or runtime power-management heuristics rather than missing firmware fields.
Hope this answer brought you some useful information. If it did, please hit “accept answer”. Should you have any questions, feel free to leave a comment.
VPHAN